Re: [PATCH v2 08/25] powerpc/8xx: Map IMMR area with 512k page at a fixed address

On Thu, 2015-09-24 at 11:41 +0000, David Laight wrote:

From: Christophe Leroy

quoted

Sent: 22 September 2015 17:51

...

quoted

Traditionaly, each driver manages one computer board which has its
own components with its own memory maps.
But on embedded chips like the MPC8xx, the SOC has all registers
located in the same IO area.

When looking at ioremaps done during startup, we see that
many drivers are re-mapping small parts of the IMMR for their own use
and all those small pieces gets their own 4k page, amplifying the
number of TLB misses: in our system we get 0xff000000 mapped 31 times
and 0xff003000 mapped 9 times.

Isn't this a more general problem?

If there are multiple remap requests for the same physical page
shouldn't the kernel be just increasing a reference count somewhere
and returning address in the same virtual page?
This should probably happen regardless of the address.
I presume it must be done for cacheable mappings.

Why would you assume that?

-Scott