Thread (33 messages) 33 messages, 3 authors, 2013-08-07

RE: [PATCH v2 1/3] powerpc/85xx: Add SEC6.0 device tree

From: Liu Po-B43644 <hidden>
Date: 2013-07-29 02:14:13

 -----Original Message-----
 From: Wood Scott-B07421
 Sent: Saturday, July 27, 2013 5:55 AM
 To: Liu Po-B43644
 Cc: linuxppc-dev@ozlabs.org; galak@kernel.crashing.org; Fleming Andy-
 AFLEMING; Hu Mingkai-B21284; Liu Po-B43644
 Subject: Re: [PATCH v2 1/3] powerpc/85xx: Add SEC6.0 device tree
=20
 On 07/25/2013 09:41:17 PM, Po Liu wrote:
 > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
 > +Job Ring (JR) Node
 > +
 > +    Child of the crypto node defines data processing interface to
 > SEC 6
 > +    across the peripheral bus for purposes of processing
 > +    cryptographic descriptors. The specified address
 > +    range can be made visible to one (or more) cores.
 > +    The interrupt defined for this node is controlled within
 > +    the address range of this node.
 > +
 > +  - compatible
 > +      Usage: required
 > +      Value type: <string>
 > +      Definition: Must include "fsl,sec-v6.0-job-ring", if it is
 > +      back compatible with old version, better add them all.
=20
 Please don't use colloquialisms such as "[you'd] better do this" in a
 formal specification.
=20
 Just say 'Must include "fsl,sec-v6.0-job-ring"' and leave it at that,
 like the other bindings do.
Ok, I'll remove redundant words.
=20
 > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
 > +Full Example
 > +
 > +Since some chips may embeded with more than one SEC 6, we abstract
 > +all the same properties into one file qoriq-sec6.0-0.dtsi. Each chip
 > +want to binding the node could simply include it in its own device
 > +node tree. Below is full example in C293PCIE:
=20
 Replace this with:
=20
 Since some chips may contain more than one SEC, the dtsi contains only
 the node contents, not the node itself.  A chip using the SEC should
 include the dtsi inside each SEC node.  Example:
=20
 > +In qoriq-sec6.0-0.dtsi:
 > +
 > +	compatible =3D "fsl,sec-v6.0";
 > +	fsl,sec-era =3D <6>;
 > +	#address-cells =3D <1>;
 > +	#size-cells =3D <1>;
 > +
 > +	jr@1000 {
 > +		compatible =3D "fsl,sec-v6.0-job-ring",
 > +			     "fsl,sec-v5.2-job-ring",
 > +			     "fsl,sec-v5.0-job-ring",
 > +			     "fsl,sec-v4.4-job-ring",
 > +			     "fsl,sec-v4.0-job-ring";
 > +		reg	   =3D <0x1000 0x1000>;
 > +	};
 > +
 > +	jr@2000 {
 > +		compatible =3D "fsl,sec-v6.0-job-ring",
 > +			     "fsl,sec-v5.2-job-ring",
 > +			     "fsl,sec-v5.0-job-ring",
 > +			     "fsl,sec-v4.4-job-ring",
 > +			     "fsl,sec-v4.0-job-ring";
 > +		reg	   =3D <0x2000 0x1000>;
 > +	};
 > +
 > +In the C293 device tree, we add the include of public property:
 > +
 > +crypto@a0000 {
 > +/include/ "qoriq-sec6.0-0.dtsi"
 > +	};
=20
 Whitespace
=20
 > +
 > +	crypto@a0000 {
 > +		reg =3D <0xa0000 0x20000>;
 > +		ranges =3D <0x0 0xa0000 0x20000>;
 > +
 > +		jr@1000{
 > +			interrupts =3D <49 2 0 0>;
 > +		};
 > +		jr@2000{
 > +			interrupts =3D <50 2 0 0>;
 > +		};
 > +	};
=20
 You could combine the above like this:
=20
 	crypto@a0000 {
 		reg =3D <0xa0000 0x20000>;
 		ranges =3D <0 0xa0000 0x20000>;
=20
 		/include/ "qoriq-sec6.0-0.dtsi"
=20
 		jr@1000 {
 			interrupts =3D <49 2 0 0>;
 		};
=20
 		jr@2000 {
 			interrupts =3D <50 2 0 0>;
 		};
 	};
=20
 Why is it "qoriq-sec6.0-0.dtsi" and not "qoriq-sec6.0-dtsi"?
Ok, I'll change to qoriq-sec6.0.dtsi
=20
 -Scott
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