Thread (38 messages) 38 messages, 12 authors, 2012-06-14

Re: [PATCH] powerpc: Optimise the 64bit optimised __clear_user

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From: Kumar Gala <hidden>
Date: 2012-06-04 14:44:29

On Jun 4, 2012, at 8:12 AM, Olof Johansson wrote:
Hi,
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On Mon, Jun 4, 2012 at 12:58 AM, Anton Blanchard [off-list ref] =
wrote:
quoted
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I blame Mikey for this. He elevated my slightly dubious testcase:
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# dd if=3D/dev/zero of=3D/dev/null bs=3D1M count=3D10000
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to benchmark status. And naturally we need to be number 1 at creating
zeros. So lets improve __clear_user some more.
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As Paul suggests we can use dcbz for large lengths. This patch gets
the destination 128 byte aligned then uses dcbz on whole cachelines.
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Before:
10485760000 bytes (10 GB) copied, 0.414744 s, 25.3 GB/s
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After:
10485760000 bytes (10 GB) copied, 0.268597 s, 39.0 GB/s
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39 GB/s, a new record.
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Signed-off-by: Anton Blanchard <redacted>
---
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Index: linux-build/arch/powerpc/lib/string_64.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
quoted
--- linux-build.orig/arch/powerpc/lib/string_64.S       2012-06-04 =
16:18:56.351604302 +1000
quoted
+++ linux-build/arch/powerpc/lib/string_64.S    2012-06-04 =
16:47:10.538500871 +1000
quoted
@@ -78,7 +78,7 @@ _GLOBAL(__clear_user)
[..]
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quoted
+15:
+err2;  dcbz    r0,r3
+       addi    r3,r3,128
+       addi    r4,r4,-128
+       bdnz    15b
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This breaks architecture spec (and at least one implementation); cache
lines are not guaranteed to be 128 bytes.
I'm guessing it breaks more than one (FSL 64-bit is 64byte cache lines).

- k=
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