Re: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip

On Tue, 2011-12-06 at 18:09 -0600, Scott Wood wrote:

On 12/03/2011 10:31 PM, shuo.liu@freescale.com wrote:

quoted

From: Liu Shuo <redacted>

Freescale FCM controller has a 2K size limitation of buffer RAM. In order
to support the Nand flash chip whose page size is larger than 2K bytes,
we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
them to a large buffer.

Signed-off-by: Liu Shuo <redacted>
---
v3:
    -remove page_size of struct fsl_elbc_mtd.
    -do a oob write by NAND_CMD_RNDIN. 

 drivers/mtd/nand/fsl_elbc_nand.c |  243 ++++++++++++++++++++++++++++++++++----
 1 files changed, 218 insertions(+), 25 deletions(-)

What is the plan for bad block marker migration?

Why it should be migrated? I thought that you support 2KiB pages, and
this adds 4 and 8 KiB pages support, which you never supported before.
What is the migration you guys are talking about?

Artem.