RE: [patch][5/5] powerpc V2: Add the general support for Embedded Floating-Point instructions

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-----Original Message-----
From: Kumar Gala [mailto:galak@kernel.crashing.org]=20
Sent: Friday, February 09, 2007 1:29 PM
To: Zhu Ebony-r57400
Cc: paulus@samba.org; linuxppc-dev@ozlabs.org
Subject: Re: [patch][5/5] powerpc V2: Add the general support=20
for Embedded Floating-Point instructions
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=20
On Feb 8, 2007, at 11:15 PM, Zhu Ebony-r57400 wrote:
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diff --git a/arch/powerpc/kernel/head_fsl_booke.S=20

b/arch/powerpc/=20

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kernel/head_fsl_booke.S index 66877bd..0d05db0 100644

--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S

@@ -705,7 +705,7 @@ #else
 #endif /* CONFIG_SPE */

 	/* SPE Floating Point Round */
-	EXCEPTION(0x2050, SPEFloatingPointRound,=20

unknown_exception,

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EXC_XFER_EE)
+	EXCEPTION(0x2050, SPEFloatingPointRound,
SPEFloatingPointException_Round, EXC_XFER_EE)

 	/* Performance Monitor */
 	EXCEPTION(0x2060, PerformanceMonitor,=20
performance_monitor_exception, EXC_XFER_STD) @@ -840,6 +840,8 @@
load_up_spe:
 	oris	r5,r5,MSR_SPE@h
 	mtmsr	r5			/* enable use=20

of SPE now */

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 	isync
+	li	r5,(SPEFSCR_FINVE | SPEFSCR_FDBZE |=20

SPEFSCR_FUNFE |

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SPEFSCR_FOVFE)
+	mtspr   SPRN_SPEFSCR,r5

We should do this via INIT_THREAD, is there a reason that

you want to

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set these always?

I just thought it's the first time that an SPE instruction is=20
encountered, so I enable the exceptions here.

Lets do this via INIT_THREAD instead, its cleaner. (just=20

remember to=20

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add the proper ifdef protection for SPE_IEEE

Talking about INIT_THREAD, I'm wondering where is the best place to=20
enble the exceptions? Please advice!

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What's the issue with enabling via INIT_THREAD?  am I missing=20
something?

Do you mean that add=20
".spefscr =3D SPEFSCR_FINV| SPEFSCR_FDBZE|SPEFSCR_FUNFE|SPEFSCR_FOVFE"
In the defination of INIT_THREAD?

I think it should work.