Dan,

It doesn't just matter if the CPU is cache coherent or not.  If you have a
System Controller, which controls
the memory, and the DMA'ing device is off of that System Controller, then
the controller must support
Snooping, to generate CleanBlock,FlushBlock, or KillBlock transactions on
the CPU's bus.

The CPU supporting cache coherency just means it supports at least one of
these snoop transactions.
Someone still needs to generate these transactions.

Paul W.


At 03:39 AM 6/29/2001 -0400, Dan Malek wrote:

jtm@smoothsmoothie.com wrote:

quoted

.... The buffer memory will get filled
via DMA, and therefore must not be cached.

Huh????  The 8260 is cache coherent, you don't need to do that.

For processors that are not cache coherent (4xx and 8xx), there
are standard 'consistent_alloc()' functions available.


-- Dan

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