Btw...Where are these "consistent_alloc()" functions?  I've not seen theses
anywhere.

I also can't imagine how they would possibly work on any CPU using BATs.
Since the BAT is setup as cacheable space, you can't just take a "chunk"
of it and make it non-cacheable.  Not possible.

Now, yes, for the 4xx and 8xx proccessors that don't use BATs, I would
assume that when you do one of these "non-cache" allocs, it would
simply allocate you a batch of 4k pages, and set them as Caching
Inhibited.

Is there something I'm missing here?

Paul W.

At 03:39 AM 6/29/2001 -0400, Dan Malek wrote:

jtm@smoothsmoothie.com wrote:

quoted

.... The buffer memory will get filled
via DMA, and therefore must not be cached.

Huh????  The 8260 is cache coherent, you don't need to do that.

For processors that are not cache coherent (4xx and 8xx), there
are standard 'consistent_alloc()' functions available.


-- Dan

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