Re: [RFC 09/13] x86/mm: Disable interrupts when flushing the TLB using CR3
From: Andy Lutomirski <luto@amacapital.net>
Date: 2016-01-09 00:18:30
Also in:
lkml
On Jan 8, 2016 3:41 PM, "Linus Torvalds" [off-list ref] wrote:
On Fri, Jan 8, 2016 at 3:15 PM, Andy Lutomirski [off-list ref] wrote:quoted
+ /* + * We mustn't be preempted or handle an IPI while reading and + * writing CR3. Preemption could switch mms and switch back, and + * an IPI could call leave_mm. Either of those could cause our + * PCID to change asynchronously. + */ + raw_local_irq_save(flags); native_write_cr3(native_read_cr3()); + raw_local_irq_restore(flags);This seems sad for two reasons: - it adds unnecessary overhead on non-pcid setups (32-bit being an example of that)
I can certainly skip the flag saving on !PCID.
- on pcid setups, wouldn't invpcid_flush_single_context() be better?
I played with that and it was slower. I don't pretend that makes any sense.
So on the whole I hate it.
Why isn't this something like
if (static_cpu_has_safe(X86_FEATURE_INVPCID)) {
invpcid_flush_single_context();
return;
}
native_write_cr3(native_read_cr3());
*without* any flag saving crud?
And yes, that means that we'd require X86_FEATURE_INVPCID in order to
use X86_FEATURE_PCID, but that seems fine.I have an SNB "Extreme" with PCID but not INVPCID, and there could be a whole generation of servers like that. I think we should fully support them. We might be able to get away with just disabling preemption instead of IRQs, at least if mm == active_mm.
Or is there some reason you wanted the odd flags version? If so, that should be documented.
What do you mean "odd"? --Andy -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@kvack.org"> email@kvack.org </a>