[PATCH RFC v2 47/70] MIPS: kernel: branch: Prevent BLTZAL emulation for MIPS R6
From: Markos Chandras <hidden>
Date: 2015-01-16 11:05:25
Subsystem:
mips, the rest · Maintainers:
Thomas Bogendoerfer, Linus Torvalds
MIPS R6 removed the BLTZAL instruction so do not try to emulate it if the R2-to-R6 emulator is not present. Signed-off-by: Markos Chandras <redacted> --- arch/mips/kernel/branch.c | 22 ++++++++++++++++++++++ arch/mips/math-emu/cp1emu.c | 4 ++++ 2 files changed, 26 insertions(+)
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index b8cc0a2e20a4..311a2223da59 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c@@ -468,7 +468,29 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, case bltzal_op: case bltzall_op: + if (NO_R6EMU && (insn.i_format.rs || + insn.i_format.rt == bltzall_op)) { + ret = -SIGILL; + break; + } regs->regs[31] = epc + 8; + /* + * OK we are here either because we hit a NAL + * instruction or because we are emulating an + * old bltzal{,l} one. Lets figure out what the + * case really is. + */ + if (!insn.i_format.rs) { + /* + * NAL or BLTZAL with rs == 0 + * Doesn't matter if we are R6 or not. The + * result is the same + */ + regs->cp0_epc += 4 + + (insn.i_format.simmediate << 2); + break; + } + /* Now do the real thing for non-R6 BLTZAL{,L} */ if ((long)regs->regs[insn.i_format.rs] < 0) { epc = epc + 4 + (insn.i_format.simmediate << 2); if (insn.i_format.rt == bltzall_op)
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 4028d536cd1c..5429efe24d5a 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c@@ -459,6 +459,10 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, switch (insn.i_format.rt) { case bltzal_op: case bltzall_op: + if (NO_R6EMU && (insn.i_format.rs || + insn.i_format.rt == bltzall_op)) + break; + regs->regs[31] = regs->cp0_epc + dec_insn.pc_inc + dec_insn.next_pc_inc;
--
2.2.1