@@ -775,7 +775,7 @@ static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
 		return 0;
 
 	if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
-				 &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
+				 &ioa_cfg->saved_pcix_cmd_reg) != 0) {
 		dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
 		return -EIO;
 	}

@@ -797,7 +797,7 @@ static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
 
 	if (pcix_cmd_reg) {
 		if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
-					  ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
+					  ioa_cfg->saved_pcix_cmd_reg) != 0) {
 			dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
 			return -EIO;
 		}

@@ -8739,7 +8739,7 @@ static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
 static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
 {
 	struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
-	int rc = PCIBIOS_SUCCESSFUL;
+	int rc = 0;
 
 	ENTER;
 	if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)

@@ -8748,7 +8748,7 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
 	else
 		rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
 
-	if (rc == PCIBIOS_SUCCESSFUL) {
+	if (rc == 0) {
 		ipr_cmd->job_step = ipr_reset_bist_done;
 		ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
 		rc = IPR_RC_JOB_RETURN;

@@ -8946,7 +8946,7 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
 	ENTER;
 	rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
 
-	if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
+	if ((rc == 0) && (cmd_reg & PCI_COMMAND_MEMORY)) {
 		ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
 		writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
 		ipr_cmd->job_step = ipr_reset_wait_to_start_bist;

@@ -10154,7 +10154,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
 	struct Scsi_Host *host;
 	unsigned long ipr_regs_pci;
 	void __iomem *ipr_regs;
-	int rc = PCIBIOS_SUCCESSFUL;
+	int rc = 0;
 	volatile u32 mask, uproc, interrupts;
 	unsigned long lock_flags, driver_lock_flags;
 	unsigned int irq_flag;

@@ -10256,7 +10256,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
 	rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
 				   ioa_cfg->chip_cfg->cache_line_size);
 
-	if (rc != PCIBIOS_SUCCESSFUL) {
+	if (rc != 0) {
 		dev_err(&pdev->dev, "Write of cache line size failed\n");
 		ipr_wait_for_pci_err_recovery(ioa_cfg);
 		rc = -EIO;

@@ -10337,7 +10337,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
 	/* Save away PCI config space for use following IOA reset */
 	rc = pci_save_state(pdev);
 
-	if (rc != PCIBIOS_SUCCESSFUL) {
+	if (rc != 0) {
 		dev_err(&pdev->dev, "Failed to save PCI config space\n");
 		rc = -EIO;
 		goto cleanup_nolog;

@@ -553,7 +553,7 @@ static void pmcraid_bist_done(struct timer_list *t)
 	rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
 
 	/* If PCI config space can't be accessed wait for another two secs */
-	if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
+	if ((rc != 0 || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
 	    cmd->time_left > 0) {
 		pmcraid_info("BIST not complete, waiting another 2 secs\n");
 		cmd->timer.expires = jiffies + cmd->time_left;

@@ -649,7 +649,7 @@ static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
 	 * BIST or slot_reset
 	 */
 	rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
-	if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
+	if ((rc == 0) && (pci_reg & PCI_COMMAND_MEMORY)) {
 
 		/* wait for IOA permission i.e until CRITICAL_OPERATION bit is
 		 * reset IOA doesn't generate any interrupts when CRITICAL

@@ -5651,7 +5651,7 @@ static int pmcraid_probe(struct pci_dev *pdev,
 	struct pmcraid_instance *pinstance;
 	struct Scsi_Host *host;
 	void __iomem *mapped_pci_addr;
-	int rc = PCIBIOS_SUCCESSFUL;
+	int rc = 0;
 
 	if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
 		pmcraid_err