Thread (101 messages) 101 messages, 14 authors, 2005-03-17

Re: [Linux-fbdev-devel] Re: radeon, apertures & memory mapping

flat view

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2005-03-14 05:09:10

On Sun, 2005-03-13 at 23:40 -0500, Jon Smirl wrote:
On Mon, 14 Mar 2005 15:07:26 +1100, Paul Mackerras [off-list ref] wrote:
quoted
xorg@lists.freedesktop.org removed from CC since I can't post to it.

Jon Smirl writes:
quoted
It shouldn't hurt to have a parallel non-cached mapping being used in
conjuction with this protocol. By definition the non-cached mapping
never gets into an inconsistent state.
According to the PowerPC Architecture specification, it is a
programming error to have both cacheable and uncacheable mappings of
the same page.  That means the hardware designers consider that they
don't have to worry if the hardware misbehaves if software does
that. :P  So that is not a feasible solution for us.

Paul.
Ok, I see this is a problem for the PPC. I've never used a PPC so you
guys have to tell me what is illegal on it.
And probably for other platforms as well. I'm pretty sure some Athlons
will be very upset too. I'm not even sure you can do that sort of tricks
on MIPS which has strange mapping rules, etc, etc, etc...

Anyway, mixing cacheable and non-cacheable mappings is asking for
trouble, just don't do it.

Having the ability to do both (selected by the platform type, or some
AGP errata bit, or whatever) is a different issue and might be worth
investigating.

Ben.




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