Re: radeon, apertures & memory mapping

On Mon, 2005-03-14 at 02:39 +0200, Ville Syrjälä wrote:

On Sun, Mar 13, 2005 at 07:25:15PM -0500, Jon Smirl wrote:

quoted

On Mon, 14 Mar 2005 10:48:19 +1100, Benjamin Herrenschmidt
[off-list ref] wrote:

quoted

quoted

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That shouldn't matter the page brought in would be for a speculative
read and never accessed. It should just fall out of the cache and not
be written back. There is only one cachable mapping. In this model
writes are always followed by a flush before telling the GPU to access
the memory that has just been written.

What about this scenario?

Speculative read -> AGP master writes new data -> CPU has invalid data in
cache :(

You need to reverse the cache flush process if you are going to read
data written by the GPU.

1) Make sure GPU is finished writing
2) flush your cache
3) read AGP memory like normal RAM.

Oh right. The CPU shouldn't write back the cached data since it hasn't 
changed.

I think you'd also need the GPU to issue an AGP flush command between 
steps 1 and 2.

Not exactly, it could wait before 3) in fact. Step 2 will just
"invalidate" the cache.

Ben.