Thread (111 messages) 111 messages, 9 authors, 2017-03-23

Re: [RFC PATCH v4 04/28] x86: Handle reduction in physical address size with SME

From: Borislav Petkov <bp@alien8.de>
Date: 2017-02-17 11:04:58
Also in: kvm, linux-arch, linux-iommu, linux-mm, lkml

On Thu, Feb 16, 2017 at 09:42:54AM -0600, Tom Lendacky wrote:
quoted hunk ↗ jump to hunk
When System Memory Encryption (SME) is enabled, the physical address
space is reduced. Adjust the x86_phys_bits value to reflect this
reduction.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
---
 arch/x86/kernel/cpu/common.c |   10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index b33bc06..358208d7 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -771,11 +771,15 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 			u64 msr;
 
 			/*
-			 * For SME, BIOS support is required. If BIOS has not
-			 * enabled SME don't advertise the feature.
+			 * For SME, BIOS support is required. If BIOS has
+			 * enabled SME adjust x86_phys_bits by the SME
+			 * physical address space reduction value. If BIOS
+			 * has not enabled SME don't advertise the feature.
 			 */
 			rdmsrl(MSR_K8_SYSCFG, msr);
-			if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT))
+			if (msr & MSR_K8_SYSCFG_MEM_ENCRYPT)
+				c->x86_phys_bits -= (ebx >> 6) & 0x3f;
+			else
 				eax &= ~0x01;
Right, as I mentioned yesterday, this should go to arch/x86/kernel/cpu/amd.c

-- 
Regards/Gruss,
    Boris.

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