[PATCH v3 7/7] arm64: tegra: Add PWM controllers on Tegra264
From: Mikko Perttunen <mperttunen@nvidia.com>
Date: 2026-03-30 08:54:19
Also in:
linux-pwm, linux-tegra, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
From: Thierry Reding <redacted> Tegra264 has a number of PWM controllers that are similar but incompatible with those found on earlier chips. Signed-off-by: Thierry Reding <redacted> [mperttunen: Adjust commit message] Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra264.dtsi | 72 ++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
index 7644a41d5f72..13fd04068016 100644
--- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi@@ -3336,6 +3336,18 @@ i2c3: i2c@c610000 { status = "disabled"; }; + pwm4: pwm@c6a0000 { + compatible = "nvidia,tegra264-pwm"; + reg = <0x0 0xc6a0000 0x0 0x10000>; + status = "disabled"; + + clocks = <&bpmp TEGRA264_CLK_PWM4>; + resets = <&bpmp TEGRA264_RESET_PWM4>; + reset-names = "pwm"; + + #pwm-cells = <2>; + }; + pmc: pmc@c800000 { compatible = "nvidia,tegra264-pmc"; reg = <0x0 0x0c800000 0x0 0x100000>,
@@ -3538,6 +3550,66 @@ i2c16: i2c@c430000 { status = "disabled"; }; + pwm2: pwm@c5e0000 { + compatible = "nvidia,tegra264-pwm"; + reg = <0x0 0xc5e0000 0x0 0x10000>; + status = "disabled"; + + clocks = <&bpmp TEGRA264_CLK_PWM2>; + resets = <&bpmp TEGRA264_RESET_PWM2>; + reset-names = "pwm"; + + #pwm-cells = <2>; + }; + + pwm3: pwm@c5f0000 { + compatible = "nvidia,tegra264-pwm"; + reg = <0x0 0xc5f0000 0x0 0x10000>; + status = "disabled"; + + clocks = <&bpmp TEGRA264_CLK_PWM3>; + resets = <&bpmp TEGRA264_RESET_PWM3>; + reset-names = "pwm"; + + #pwm-cells = <2>; + }; + + pwm5: pwm@c600000 { + compatible = "nvidia,tegra264-pwm"; + reg = <0x0 0xc600000 0x0 0x10000>; + status = "disabled"; + + clocks = <&bpmp TEGRA264_CLK_PWM5>; + resets = <&bpmp TEGRA264_RESET_PWM5>; + reset-names = "pwm"; + + #pwm-cells = <2>; + }; + + pwm9: pwm@c610000 { + compatible = "nvidia,tegra264-pwm"; + reg = <0x0 0xc610000 0x0 0x10000>; + status = "disabled"; + + clocks = <&bpmp TEGRA264_CLK_PWM9>; + resets = <&bpmp TEGRA264_RESET_PWM9>; + reset-names = "pwm"; + + #pwm-cells = <2>; + }; + + pwm10: pwm@c620000 { + compatible = "nvidia,tegra264-pwm"; + reg = <0x0 0xc620000 0x0 0x10000>; + status = "disabled"; + + clocks = <&bpmp TEGRA264_CLK_PWM10>; + resets = <&bpmp TEGRA264_RESET_PWM10>; + reset-names = "pwm"; + + #pwm-cells = <2>; + }; + i2c0: i2c@c630000 { compatible = "nvidia,tegra264-i2c"; reg = <0x00 0x0c630000 0x0 0x10000>;
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2.53.0