[PATCH v3 3/7] pwm: tegra: Modify read/write accessors for multi-register channel
From: Mikko Perttunen <mperttunen@nvidia.com>
Date: 2026-03-30 08:54:08
Also in:
linux-pwm, linux-tegra, lkml
Subsystem:
pwm subsystem, tegra pwm driver, the rest · Maintainers:
Uwe Kleine-König, Thierry Reding, Linus Torvalds
On Tegra264, each PWM instance has two registers (per channel, of which there is one). Update the pwm_readl/pwm_writel helper functions to take channel (as struct pwm_device *) and offset separately. Reviewed-by: Thierry Reding <redacted> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> --- drivers/pwm/pwm-tegra.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pwm/pwm-tegra.c
index 759b98b97b6e..cf54f75d92a5 100644
--- a/drivers/pwm/pwm-tegra.c
+++ b/drivers/pwm/pwm-tegra.c@@ -57,6 +57,8 @@ #define PWM_SCALE_WIDTH 13 #define PWM_SCALE_SHIFT 0 +#define PWM_CSR_0 0 + struct tegra_pwm_soc { unsigned int num_channels; };
@@ -78,14 +80,18 @@ static inline struct tegra_pwm_chip *to_tegra_pwm_chip(struct pwm_chip *chip) return pwmchip_get_drvdata(chip); } -static inline u32 pwm_readl(struct tegra_pwm_chip *pc, unsigned int offset) +static inline u32 pwm_readl(struct pwm_device *dev, unsigned int offset) { - return readl(pc->regs + (offset << 4)); + struct tegra_pwm_chip *chip = to_tegra_pwm_chip(dev->chip); + + return readl(chip->regs + (dev->hwpwm * 16) + offset); } -static inline void pwm_writel(struct tegra_pwm_chip *pc, unsigned int offset, u32 value) +static inline void pwm_writel(struct pwm_device *dev, unsigned int offset, u32 value) { - writel(value, pc->regs + (offset << 4)); + struct tegra_pwm_chip *chip = to_tegra_pwm_chip(dev->chip); + + writel(value, chip->regs + (dev->hwpwm * 16) + offset); } static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
@@ -194,7 +200,7 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, } else val |= PWM_ENABLE; - pwm_writel(pc, pwm->hwpwm, val); + pwm_writel(pwm, PWM_CSR_0, val); /* * If the PWM is not enabled, turn the clock off again to save power.
@@ -207,7 +213,6 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, static int tegra_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) { - struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip); int rc = 0; u32 val;
@@ -215,21 +220,20 @@ static int tegra_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) if (rc) return rc; - val = pwm_readl(pc, pwm->hwpwm); + val = pwm_readl(pwm, PWM_CSR_0); val |= PWM_ENABLE; - pwm_writel(pc, pwm->hwpwm, val); + pwm_writel(pwm, PWM_CSR_0, val); return 0; } static void tegra_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) { - struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip); u32 val; - val = pwm_readl(pc, pwm->hwpwm); + val = pwm_readl(pwm, PWM_CSR_0); val &= ~PWM_ENABLE; - pwm_writel(pc, pwm->hwpwm, val); + pwm_writel(pwm, PWM_CSR_0, val); pm_runtime_put_sync(pwmchip_parent(chip)); }
--
2.53.0