Re: [PATCH 5/6] arm64: dts: imx8mm: add PCIe support
From: Rob Herring <robh+dt@kernel.org>
Date: 2021-07-29 14:25:52
Also in:
linux-arm-kernel, linux-pci, lkml
On Fri, Jul 23, 2021 at 2:50 PM Tim Harvey [off-list ref] wrote:
quoted hunk ↗ jump to hunk
Add PCIe node for PCIe support. Signed-off-by: Tim Harvey <tharvey@gateworks.com> --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 36 +++++++++++++++++++++++ 1 file changed, 36 insertions(+)diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 3bec6b8d52a0..45017f50a11b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi@@ -1134,6 +1134,10 @@ reg = <0x32e50200 0x200>; }; + pcie_phy: pcie-phy@32f00000 { + compatible = "fsl,imx7d-pcie-phy"; + reg = <0x32f00000 0x10000>;
The phy really has 64KB worth of registers? This wastes virtual space too, but I guess that's 'free' on 64-bit.
quoted hunk ↗ jump to hunk
+ }; }; dma_apbh: dma-controller@33000000 {@@ -1233,5 +1237,37 @@ reg = <0x3d800000 0x400000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; }; + + pcie0: pcie@33800000 { + compatible = "fsl,imx8mm-pcie"; + reg = <0x33800000 0x400000>, + <0x1ff00000 0x80000>; + reg-names = "dbi", "config";
I don't think the DBI space ever has 4MB of registers. And IIRC, only 4KB is used for config space unless ECAM is used.
+ #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x00 0xff>; + ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ + 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ + num-lanes = <1>; + num-viewport = <4>;
This is deprecated and ignored. The driver has gotten smarter and detects this.
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + fsl,max-link-speed = <2>;
There's a standard property for this.
+ power-domains = <&pgc_pcie>; + resets = <&src IMX8MQ_RESET_PCIEPHY>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_CLK_REQ>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "clkreq", "turnoff";
The phy reset belongs in the phy node.
+ fsl,imx7d-pcie-phy = <&pcie_phy>;
Didn't we deprecate this? Either way, use the phy binding.
+ status = "disabled";
+ };
};
};
--
2.17.1