Hi Tony,

Am 12.01.2016 um 22:27 schrieb H. Nikolaus Schaller [off-list ref]:

Hi Tony,

Am 12.01.2016 um 14:30 schrieb H. Nikolaus Schaller [off-list ref]:

quoted

Hi Tony,

Am 12.01.2016 um 01:09 schrieb Tony Lindgren [off-list ref]:

quoted

* Tony Lindgren [off-list ref] [160111 12:27]:

quoted

OK so the issue is that the twl msecure pin should be high to enable
the RTC registers. We used to have that code with platform_data, but
no longer have it with device tree based booting. I'll send a patch
for that.

Curiously setting jumper j5 on beagle-x15 that controls what used to
be the msecure and now is powerhold, does the opposite.. The
device boots automatically but RTC is stopped?

And here's a fix the issue for omap5. Beagle-x15 needs to be
investigated more.

Care to test it with your RTC enabling patch?

yes, I will test asap.

Reminds me on some issues we did have with msecure and twl4030 rtc some years ago.

Ok, works for me on OMAP5432EVM.

Yes, it works, but I didn't look into the code yet.

Thanks for spotting the issue.

quoted

BR,
Nikolaus

quoted

Regards,

Tony

8< ---------------
From: Tony Lindgren <tony@atomide.com>
Date: Mon, 11 Jan 2016 14:35:24 -0800
Subject: [PATCH] ARM: dts: Fix omap5 PMIC control lines for RTC writes

The palmas PMIC has some control lines that need to be muxed properly
for things to work. The sys_nirq pin is used for interrupts, and msecure
pin is used for enabling writes to some PMIC registers.

Without these pins configured properly things can fail in mysterious
ways. For example, we can't update the RTC registers on palmas PMIC
unless the msecure pin is configured. And this is probably the reason
why we had RTC missing from the omap5 dts file.

According to "OMAP5430 ES2.0 Data Manual [Public] VErsion A (Rev. F)"
swps052f.pdf, mux mode 1 is for sys_drm_msecure so there's no need to
configure it as a GPIO pin.

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi

@@ -213,6 +213,12 @@

		>;
	};

+	palmas_msecure_pins: palmas_msecure_pins {
+		pinctrl-single,pins = <
+			OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE1) /* gpio8_234.sys_drm_msecure */

I wonder now what MODE1 is.

In my OMAP5 TRM (Version "Y" - may be too old) the MODE1 is tagged as "reserved".

Maybe "reserved" happens to output a "1" on OMAP5 and a "0" on the X15?

And as far as I am aware there is no "driver" for some MSECURE module (but I don't know the details of MSECURE control by software).

This one

quoted

quoted

		OMAP5_IOPAD(0x180, PIN_INPUT _PULLUP | MUX_MODE6) /* gpio8_234 used for sys_drm_msecure */

works for me on the OMAP5 EVM as well.

BR,
Nikolaus

quoted

quoted

+		>;
+	};
+
	usbhost_pins: pinmux_usbhost_pins {
		pinctrl-single,pins = <
			0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */

@@ -278,6 +284,12 @@

			&usbhost_wkup_pins
	>;

+	palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
+		pinctrl-single,pins = <
+			OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
+		>;
+	};
+
	usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
		pinctrl-single,pins = <
			0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */

@@ -345,6 +357,8 @@

		interrupt-controller;
		#interrupt-cells = <2>;
		ti,system-power-controller;
+		pinctrl-names = "default";
+		pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;

		extcon_usb3: palmas_usb {
			compatible = "ti,palmas-usb-vid";