[PATCH 11/13] dt-bindings: clock: exynos8855: add usb clock definitions
From: raghav.s <hidden>
Date: 2026-07-28 11:54:03
Also in:
linux-clk, linux-devicetree, linux-samsung-soc, lkml
Subsystem:
common clk framework, open firmware and flattened device tree bindings, samsung soc clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi, Peter Griffin, Linus Torvalds
Add device tree clock binding definitions for CMU_USB Signed-off-by: raghav.s <redacted> --- .../clock/samsung,exynos8855-clock.yaml | 21 +++++++++++++++++++ .../dt-bindings/clock/samsung,exynos8855.h | 12 +++++++++++ 2 files changed, 33 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml
index e97b65f8be5f..736d3429bf4c 100644
--- a/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml@@ -32,6 +32,7 @@ properties: - samsung,exynos8855-cmu-peric - samsung,exynos8855-cmu-peris - samsung,exynos8855-cmu-top + - samsung,exynos8855-cmu-usb clocks: minItems: 1
@@ -126,6 +127,26 @@ allOf: items: - const: oscclk + - if: + properties: + compatible: + contains: + const: samsung,exynos8855-cmu-usb + + then: + properties: + clocks: + items: + - description: External reference clock (76.8 MHz) + - description: CMU_USB NOC clock (from CMU_TOP) + - description: CMU_USB USB20DRD clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: usb20drd + required: - compatible - "#clock-cells"
diff --git a/include/dt-bindings/clock/samsung,exynos8855.h b/include/dt-bindings/clock/samsung,exynos8855.h
index 44484a9d67f5..bf76464298d2 100644
--- a/include/dt-bindings/clock/samsung,exynos8855.h
+++ b/include/dt-bindings/clock/samsung,exynos8855.h@@ -59,6 +59,10 @@ #define CLKCMU_MOUT_HSI_UFS_EMBD 47 #define CLKCMU_DOUT_HSI_NOC 48 #define CLKCMU_DOUT_HSI_UFS_EMBD 49 +#define CLKCMU_MOUT_USB_NOC 50 +#define CLKCMU_MOUT_USB_USB20DRD 51 +#define CLKCMU_DOUT_USB_NOC 52 +#define CLKCMU_DOUT_USB_USB20DRD 53 /* CMU_PERIC */ #define CLK_MOUT_PERIC_IP_USER 1
@@ -105,4 +109,12 @@ #define CLK_GOUT_CMU_HSI_IPCLKPORT_PCLK 3 #define CLK_GOUT_SYSREG_HSI_IPCLKPORT_PCLK 4 +/* CMU_USB */ +#define CLK_MOUT_USB_NOC_USER 1 +#define CLK_MOUT_USB_USB20DRD 2 +#define CLK_MOUT_USB_USB20DRD_USER 3 +#define CLK_DOUT_USB_NOC_DIV3 4 +#define CLK_GOUT_CMU_USB_IPCLKPORT_PCLK 5 +#define CLK_GOUT_SYSREG_USB_IPCLKPORT_PCLK 6 + #endif /* _DT_BINDINGS_CLOCK_EXYNOS8855_H */
--
2.34.1