[PATCH 01/13] clk: samsung: clk-pll: Add supoprt for pll_4313
From: raghav.s <hidden>
Date: 2026-07-28 11:53:15
Also in:
linux-clk, linux-devicetree, linux-samsung-soc, lkml
Subsystem:
common clk framework, samsung soc clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi, Peter Griffin, Linus Torvalds
From: Alim Akhtar <alim.akhtar@samsung.com> PLLs 4313 are found in the Exynos8855 SoC and it is similar to pll_531x except for CON8 offset, so re-using code for pll_4313 Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: raghav.s <redacted> --- drivers/clk/samsung/clk-pll.c | 11 ++++++++++- drivers/clk/samsung/clk-pll.h | 1 + 2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index e74552846ba3..b7605aa3c647 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c@@ -1306,7 +1306,15 @@ static unsigned long samsung_pll531x_recalc_rate(struct clk_hw *hw, u64 mdiv, fout = parent_rate; pll_con0 = readl_relaxed(pll->con_reg); - pll_con8 = readl_relaxed(pll->con_reg + 20); + if (pll->type == pll_4313) { + /* Offset for PLL_CON8 which hold FDIV different for PLL_4313 + * which is PLL_LOCKTIME_OFFSET - 0x4 + */ + pll_con8 = readl_relaxed(pll->lock_reg - 4); + } else { + pll_con8 = readl_relaxed(pll->con_reg + 20); + } + mdiv = (pll_con0 >> PLL531X_MDIV_SHIFT) & PLL531X_MDIV_MASK; pdiv = (pll_con0 >> PLL531X_PDIV_SHIFT) & PLL531X_PDIV_MASK; sdiv = (pll_con0 >> PLL531X_SDIV_SHIFT) & PLL531X_SDIV_MASK;
@@ -1728,6 +1736,7 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, break; case pll_531x: case pll_4311: + case pll_4313: init.ops = &samsung_pll531x_clk_ops; break; case pll_1031x:
diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h
index d6eb3246611b..ad47dd7b3ed2 100644
--- a/drivers/clk/samsung/clk-pll.h
+++ b/drivers/clk/samsung/clk-pll.h@@ -49,6 +49,7 @@ enum samsung_pll_type { pll_0718x, pll_0732x, pll_4311, + pll_4313, pll_1017x, pll_1031x, pll_a9fracm,
--
2.34.1