[PATCH 05/13] dt-bindings: clock: exynos8855: add peris clock definitions
From: raghav.s <hidden>
Date: 2026-07-28 11:53:29
Also in:
linux-clk, linux-devicetree, linux-samsung-soc, lkml
Subsystem:
common clk framework, open firmware and flattened device tree bindings, samsung soc clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi, Peter Griffin, Linus Torvalds
Add device tree clock binding definitions for CMU_PERIS Signed-off-by: raghav.s <redacted> --- .../clock/samsung,exynos8855-clock.yaml | 21 +++++++++++++++++++ .../dt-bindings/clock/samsung,exynos8855.h | 16 ++++++++++++++ 2 files changed, 37 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml
index 073c19debd0d..62277c67fec1 100644
--- a/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml@@ -29,6 +29,7 @@ properties: compatible: enum: - samsung,exynos8855-cmu-peric + - samsung,exynos8855-cmu-peris - samsung,exynos8855-cmu-top clocks:
@@ -68,6 +69,26 @@ allOf: - const: mmc_card - const: ip + - if: + properties: + compatible: + contains: + const: samsung,exynos8855-cmu-peris + + then: + properties: + clocks: + items: + - description: External reference clock (76.8 MHz) + - description: CMU_PERIS GIC clock (from CMU_TOP) + - description: CMU_PERIS NOC clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: gic + - const: bus + - if: properties: compatible:
diff --git a/include/dt-bindings/clock/samsung,exynos8855.h b/include/dt-bindings/clock/samsung,exynos8855.h
index 14369b749fb2..9efaf3e330b4 100644
--- a/include/dt-bindings/clock/samsung,exynos8855.h
+++ b/include/dt-bindings/clock/samsung,exynos8855.h@@ -50,6 +50,11 @@ #define DOUT_SHARED4_DIV4 38 #define FOUT_MMC_PLL_DIV1 39 #define FOUT_MMC_PLL_DIV2 40 +#define CLKCMU_MOUT_PERIS_GIC 41 +#define CLKCMU_MOUT_PERIS_NOC 42 +#define CLKCMU_DOUT_PERIS_GIC 43 +#define CLKCMU_DOUT_PERIS_NOC 44 +#define FOUT_MMC_PLL_CLKOUT_DIV2 45 /* CMU_PERIC */ #define CLK_MOUT_PERIC_IP_USER 1
@@ -79,4 +84,15 @@ #define CLK_GOUT_UART_DBG_PERIC_IPCLKPORT_PCLK 25 #define CLK_GOUT_USI_PERIC_IPCLKPORT_PCLK 26 +/* CMU_PERIS */ +#define CLK_MOUT_PERIS_NOC_USER 1 +#define CLK_MOUT_PERIS_GIC 2 +#define CLK_MOUT_PERIS_GIC_USER 3 +#define CLK_DOUT_PERIS_NOCP 4 +#define CLK_DOUT_PERIS_OTP 5 +#define CLK_GOUT_CMU_PERIS_IPCLKPORT_PCLK 6 +#define CLK_GOUT_SYSREG_PERIS_IPCLKPORT_PCLK 7 +#define CLK_GOUT_WDT0_PERIS_IPCLKPORT_PCLK 8 +#define CLK_GOUT_WDT1_PERIS_IPCLKPORT_PCLK 9 + #endif /* _DT_BINDINGS_CLOCK_EXYNOS8855_H */
--
2.34.1