On 9/25/2025 2:40 PM, Bryan O'Donoghue wrote:
On 25/09/2025 00:56, Jingyi Wang wrote:
quoted
+static u32 cam_cc_kaanapali_critical_cbcrs[] = {
+ 0x21398, /* CAM_CC_DRV_AHB_CLK */
+ 0x21390, /* CAM_CC_DRV_XO_CLK */
+ 0x21364, /* CAM_CC_GDSC_CLK */
+ 0x21368, /* CAM_CC_SLEEP_CLK */
+};
How is this critical list decided ?
Bryan, these are list based on design recommendations.
For example why is the AHB clock critical but the CAMNOC and AXI clocks
not critical ?
AHB clock is required for access and NOC & AXI needs to be managed by
the client SW driver.
---
bod
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Thanks,
Taniya Das