Hi Ben,

On 28/07/2025 11:49, Ben Horgan wrote:

On 7/11/25 19:36, James Morse wrote:

quoted

Register and enable error IRQs. All the MPAM error interrupts indicate a
software bug, e.g. out of range partid. If the error interrupt is ever
signalled, attempt to disable MPAM.

Only the irq handler accesses the ESR register, so no locking is needed.
The work to disable MPAM after an error needs to happen at process
context, use a threaded interrupt.

There is no support for percpu threaded interrupts, for now schedule
the work to be done from the irq handler.

Enabling the IRQs in the MSC may involve cross calling to a CPU that
can access the MSC.

diff --git a/drivers/platform/arm64/mpam/mpam_devices.c b/drivers/platform/arm64/mpam/

mpam_devices.c
index 145535cd4732..af19cc25d16e 100644

--- a/drivers/platform/arm64/mpam/mpam_devices.c
+++ b/drivers/platform/arm64/mpam/mpam_devices.c

@@ -1548,11 +1638,193 @@ static void mpam_enable_merge_features(struct list_head

quoted

+static int mpam_enable_msc_ecr(void *_msc)
+{
+    struct mpam_msc *msc = _msc;
+
+    __mpam_write_reg(msc, MPAMF_ECR, 1);

You can use MPAMF_ECR_INTEN.

Sure,

quoted

+
+    return 0;
+}

quoted

@@ -1644,7 +1939,6 @@ void mpam_enable(struct work_struct *work)
      struct mpam_msc *msc;
      bool all_devices_probed = true;
  -    /* Have we probed all the hw devices? */

Stray change. Keep the comment or remove it in the patch that introduced it.

Fixed.


Thanks,

James