Re: [RFC PATCH 16/36] arm_mpam: Add MPAM MSC register layout definitions
From: James Morse <james.morse@arm.com>
Date: 2025-08-06 18:04:44
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Hi Shaopeng, On 17/07/2025 02:04, Shaopeng Tan (Fujitsu) wrote:
quoted
Memory Partitioning and Monitoring (MPAM) has memory mapped devices (MSCs) with an identity/configuration page. Add the definitions for these registers as offset within the page(s).
quoted
diff --git a/drivers/platform/arm64/mpam/mpam_internal.hb/drivers/platform/arm64/mpam/mpam_internal.h index d49bb884b433..9110c171d9d2 100644--- a/drivers/platform/arm64/mpam/mpam_internal.h +++ b/drivers/platform/arm64/mpam/mpam_internal.h@@ -150,4 +150,272 @@ extern struct list_head mpam_classes; int
quoted
+/* + * MSMON_CFG_CSU_CTL - Memory system performance monitor configure cache storage + * usage monitor control register + * MSMON_CFG_MBWU_CTL - Memory system performance monitor configure memory + * bandwidth usage monitor control register + */ +#define MSMON_CFG_x_CTL_TYPE GENMASK(7, 0) +#define MSMON_CFG_x_CTL_OFLOW_STATUS_L BIT(15) +#define MSMON_CFG_x_CTL_MATCH_PARTID BIT(16) +#define MSMON_CFG_x_CTL_MATCH_PMG BIT(17) +#define MSMON_CFG_x_CTL_SCLEN BIT(19) +#define MSMON_CFG_x_CTL_SUBTYPE GENMASK(23, 20) +#define MSMON_CFG_x_CTL_OFLOW_FRZ BIT(24) +#define MSMON_CFG_x_CTL_OFLOW_INTR BIT(25) +#define MSMON_CFG_x_CTL_OFLOW_STATUS BIT(26) +#define MSMON_CFG_x_CTL_CAPT_RESET BIT(27) +#define MSMON_CFG_x_CTL_CAPT_EVNT GENMASK(30, 28) +#define MSMON_CFG_x_CTL_EN BIT(31) + +#define MSMON_CFG_MBWU_CTL_TYPE_MBWU 0x42 +#define MSMON_CFG_MBWU_CTL_TYPE_CSU 0x43
MSMON_CFG_CSU_CTL_TYPE_CSU?
Yup, copy-and-paste error. Thanks! James