[PATCH 02/16] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Add #reset-cells for RZ/G3S
From: Claudiu <claudiu.beznea@tuxon.dev>
Date: 2024-08-22 15:28:21
Also in:
linux-clk, linux-devicetree, linux-phy, linux-pm, linux-renesas-soc, linux-usb, lkml
Subsystem:
arm/risc-v/renesas architecture, open firmware and flattened device tree bindings, the rest · Maintainers:
Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> The RZ/G3S System controller has registers to control signals that need to be de-asserted/asserted before/after different SoC areas are power on/off. This signals are implemented as reset signals. For this document the #reset-cells property. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> --- .../bindings/soc/renesas/renesas,rzg2l-sysc.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
index 4386b2c3fa4d..6b0bb34485d9 100644
--- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
+++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml@@ -42,12 +42,28 @@ properties: - const: cm33stbyr_int - const: ca55_deny + "#reset-cells": + const: 1 + required: - compatible - reg additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a08g045-sysc + then: + required: + - "#reset-cells" + else: + properties: + "#reset-cells": false + examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h>
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2.39.2