[AMD Official Use Only - General]

-----Original Message-----
From: Krzysztof Kozlowski <redacted>
Sent: Tuesday, January 17, 2023 11:24 PM
To: Gupta, Nipun <Nipun.Gupta@amd.com>; robh+dt@kernel.org;
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Cc: okaya@kernel.org; Anand, Harpreet <redacted>; Agarwal,
Nikhil [off-list ref]; Simek, Michal [off-list ref];
git (AMD-Xilinx) [off-list ref]
Subject: Re: [PATCH 03/19] dt-bindings: bus: add CDX bus controller device tree
bindings

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On 17/01/2023 14:41, Nipun Gupta wrote:

quoted

Add device tree bindings for CDX bus controller.

Subject: drop second/last, redundant "device tree bindings". The
"dt-bindings" prefix is already stating that these are bindings.

Agree. Will update.

quoted

Signed-off-by: Nipun Gupta <nipun.gupta@amd.com>
---
 .../bindings/bus/xlnx,cdxbus-controller.yaml  | 68 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 69 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/bus/xlnx,cdxbus-

controller.yaml

quoted

diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdxbus-

controller.yaml b/Documentation/devicetree/bindings/bus/xlnx,cdxbus-
controller.yaml

quoted

new file mode 100644
index 000000000000..b2f186864021

--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml

@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/xlnx,cdxbus-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AMD CDX bus controller
+
+description: |
+  CDX bus controller for AMD devices is implemented to dynamically
+  detect CDX bus and devices on these bus using the firmware.
+  The CDX bus manages multiple FPGA based hardware devices, which
+  can support network, crypto or any other specialized type of
+  devices. These FPGA based devices can be added/modified dynamically
+  on run-time.
+
+  All devices on the CDX bus will have a unique streamid (for IOMMU)
+  and a unique device ID (for MSI) corresponding to a requestor ID
+  (one to one associated with the device). The streamid and deviceid
+  are used to configure SMMU and GIC-ITS respectively.
+
+  iommu-map property is used to define the set of stream ids
+  corresponding to each device and the associated IOMMU.
+
+  The MSI writes are accompanied by sideband data (Device ID).
+  The msi-map property is used to associate the devices with the
+  device ID as well as the associated ITS controller.
+
+  rproc property (xlnx,rproc) is used to identify the remote processor
+  with which APU (Application Processor Unit) interacts to find out
+  the bus and device configuration.
+
+maintainers:
+  - Nipun Gupta <nipun.gupta@amd.com>
+  - Nikhil Agarwal <nikhil.agarwal@amd.com>
+
+properties:
+  compatible:
+    const: xlnx,cdxbus-controller

This misses SoC specific compatible. Drop "bus" - redundant. I would
also say - drop controller - do you see any other devices with such
compatible naming? Use naming consistent with other devices in the
kernel. Just open some controllers - SPI, I2C etc. and look there.

Makes sense. Will use "xlnx,cdx" in compatible.

quoted

+
+  iommu-map: true

No mask?

Currently there is no use for iommu-map-mask as RID's are one to
one mapped stream ID's, so we have not added this optional property.

quoted

+
+  msi-map: true
+
+  xlnx,rproc:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      phandle to the remoteproc_r5 rproc node using which APU interacts
+      with remote processor.
+
+required:
+  - compatible
+  - iommu-map
+  - msi-map
+  - xlnx,rproc
+
+additionalProperties: false
+
+examples:
+  - |
+    cdxbus-controller {

Node names should be generic, so just cdx.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-
basics.html#generic-names-recommendation

Sure. Will update to cdx.

Thanks,
Nipun

quoted

+        compatible = "xlnx,cdxbus-controller";
+        /* define map for RIDs 250-259 */
+        iommu-map = <250 &smmu 250 10>;

Best regards,
Krzysztof

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