[PATCH v5 2/5] ARM: dts: NSP: Add Ax stepping modifications
From: Matthew Hagan <hidden>
Date: 2021-08-06 20:45:25
Also in:
linux-devicetree, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
While uncommon, some Ax NSP SoCs exist in the wild. This stepping requires a modified secondary CPU boot-reg and removal of DMA coherency properties. Without these modifications, the secondary CPU will be inactive and many peripherals will exhibit undefined behaviour. Signed-off-by: Matthew Hagan <redacted> --- arch/arm/boot/dts/bcm-nsp-ax.dtsi | 70 +++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 arch/arm/boot/dts/bcm-nsp-ax.dtsi
diff --git a/arch/arm/boot/dts/bcm-nsp-ax.dtsi b/arch/arm/boot/dts/bcm-nsp-ax.dtsi
new file mode 100644
index 000000000000..a21e275935ce
--- /dev/null
+++ b/arch/arm/boot/dts/bcm-nsp-ax.dtsi@@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Broadcom Northstar Plus Ax stepping-specific bindings. + * Notable differences from B0+ are the secondary-boot-reg and + * lack of DMA coherency. + */ + +&cpu1 { + secondary-boot-reg = <0xffff042c>; +}; + +&dma { + /delete-property/ dma-coherent; +}; + +&sdio { + /delete-property/ dma-coherent; +}; + +&amac0 { + /delete-property/ dma-coherent; +}; + +&amac1 { + /delete-property/ dma-coherent; +}; + +&amac2 { + /delete-property/ dma-coherent; +}; + +&ehci0 { + /delete-property/ dma-coherent; +}; + +&mailbox { + /delete-property/ dma-coherent; +}; + +&xhci { + /delete-property/ dma-coherent; +}; + +&ehci0 { + /delete-property/ dma-coherent; +}; + +&ohci0 { + /delete-property/ dma-coherent; +}; + +&i2c0 { + /delete-property/ dma-coherent; +}; + +&sata { + /delete-property/ dma-coherent; +}; + +&pcie0 { + /delete-property/ dma-coherent; +}; + +&pcie1 { + /delete-property/ dma-coherent; +}; + +&pcie2 { + /delete-property/ dma-coherent; +};
--
2.26.3
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