On Thu, Mar 4, 2021 at 12:03 AM Serge Semin [off-list ref] wrote:

On Wed, Mar 03, 2021 at 07:41:40PM -0800, Brad Larson wrote:

quoted

Add Pensando common and Elba SoC specific device nodes
and corresponding binding documentation.

This also needs to be split up into sub-patches seeing these are
unrelated changes like device bindings update, new platform DT file.

In patchset v2 this is split into sub-patches.

What about converting this file to DT-schema and adding new HW
bindings in there?

Converted existing file devicetree/bindings/spi/cadence-quadspi.txt to
YAML schema.

quoted

+&spi0 {
+     num-cs = <4>;

quoted

+     cs-gpios = <&spics 0 0>, <&spics 1 0>, <&porta 1 0>, <&porta 7 0>;

Oh, you've got four peripheral SPI devices connected with only two native CS
available. Hmm, then I don't really know a better way, but just to forget about
the native DW APB CS functionality and activate the direct driving of
all the CS-pins at the moment of the DW APB SPI controller probe
procedure. Then indeed you'll need a custom CS function defined in the DW APB
SPI driver to handle that.

Yes, with an Elba SoC specific gpio driver.

So that GPIO-controller is just a single register which provides a way
to toggle the DW APB SPI CS-mode together with their output value.
If so and seeing there are a few more tiny spaces of config
registers added to eMMC, PCI, etc DT node, I suppose all of them
belong to some bigger config space of the SoC. Thus I'd suggest to at
least implement them as part of a System Controller DT node. Then use
that device service to switch on/off corresponding functionality.
See [2] and the rest of added to the kernel DTS files with
syscon-nodes for example.

[2] Documentation/devicetree/bindings/mfd/syscon.yaml

To us it was more understandable to implement a standard gpio driver
for the spi chip-selects.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel