Re: [PATCH v2 6/8] drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver
From: Mark Rutland <mark.rutland@arm.com>
Date: 2021-02-03 13:30:16
On Wed, Feb 03, 2021 at 03:51:06PM +0800, Shaokun Zhang wrote:
HiSilicon's Hip09 is comprised by multi-dies that can be connected by SLLC module (Skyros Link Layer Controller), its has separate PMU registers which the driver can program it freely and interrupt is supported to handle counter overflow. Let's support its driver under the framework of HiSilicon uncore PMU driver.
[...]
+HISI_PMU_EVENT_ATTR_EXTRACTOR(tgtid_lo, config1, 10, 0); +HISI_PMU_EVENT_ATTR_EXTRACTOR(tgtid_hi, config1, 21, 11); +HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_cmd, config1, 32, 22); +HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_msk, config1, 43, 33); +HISI_PMU_EVENT_ATTR_EXTRACTOR(tracetag_en, config1, 44, 44);
If you could describe these fields in the commit message that would be helpful. What is a 'tgtid'? Is that a 'target ID' or something to that effect? [...]
+ HISI_PMU_FORMAT_ATTR(tgtid_low, "config1:0-10"), + HISI_PMU_FORMAT_ATTR(tgtid_high, "config1:11-21"),
Does this need to be exposed to userspace in two halves, rather than being a single 'tgtid' field that the driver can decompose as necessary? Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel