On Wed, Dec 09, 2020 at 07:49:09PM +0000, Krishna Reddy wrote:

Hi Jean,

quoted

quoted

Why is BTM mandated for SVA? I couldn't find this requirement in 
SMMU spec (Sorry if I missed it or this got discussed earlier). But 
if performance is the

only concern here,

quoted

is it better just to allow it with a warning rather than limiting 
SMMUs without

BTM?

It's a performance concern and requires to support multiple 
configurations, but the spec allows it. Are there SMMUs without BTM 
that need it?

The Tegra Next Generation SOC uses arm-smmu-v3, but it doesn't have support for BTM.
Do you have plan to get your earlier patch to handle invalidate notifications into upstream sometime soon? 
Can the dependency on BTM be relaxed with the patch?

PATCH v9 13/13] iommu/arm-smmu-v3: Hook up ATC invalidation to mm ops
https://www.spinics.net/lists/arm-kernel/msg825099.html

This patch (which should be in 5.11) only takes care of sending ATC
invalidations to PCIe endpoints. With this, BTM is still required to
invalidate SMMU TLBs.

However we could enable command-queue invalidation when ARM_SMMU_FEAT_BTM
isn't set. Invalidations are still a relatively rare event so it may not
be outrageously slow. I can add a patch to my tree if you have hardware to
test. This could also be a first step for enabling SVA on other systems as
well, because I'm not finding time to work on BTM at the moment (requires
pinning VMIDs in KVM).

Thanks,
Jean

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