-----Original Message-----
From: Jean-Philippe Brucker [mailto:jean-philippe@linaro.org]
Sent: 24 September 2020 11:14
To: Shameerali Kolothum Thodi <redacted>
Cc: iommu@lists.linux-foundation.org; linux-arm-kernel@lists.infradead.org;
linux-mm@kvack.org; fenghua.yu@intel.com; catalin.marinas@arm.com;
Suzuki K Poulose [off-list ref]; robin.murphy@arm.com;
zhangfei.gao@linaro.org; will@kernel.org
Subject: Re: [PATCH v10 10/13] iommu/arm-smmu-v3: Check for SVA features

Hi Shameer,

On Mon, Sep 21, 2020 at 08:59:39AM +0000, Shameerali Kolothum Thodi
wrote:

quoted

quoted

+bool arm_smmu_sva_supported(struct arm_smmu_device *smmu)
+{
+	unsigned long reg, fld;
+	unsigned long oas;
+	unsigned long asid_bits;
+	u32 feat_mask = ARM_SMMU_FEAT_BTM |
ARM_SMMU_FEAT_COHERENCY;

Why is BTM mandated for SVA? I couldn't find this requirement in SMMU spec
(Sorry if I missed it or this got discussed earlier). But if performance is the

only concern here,

quoted

is it better just to allow it with a warning rather than limiting SMMUs without

BTM?

It's a performance concern and requires to support multiple
configurations, but the spec allows it. Are there SMMUs without BTM that
need it?

Ok. Thanks for clarifying. May be better to add a comment here. Our platforms
do support BTM, but I had a strange case where the UEFI didn't enable DVM
but SMMU reported BTM and was causing random failures due to lack of
explicit tlbi on mm invalidation. Anyway that doesn't count here :)

Thanks,
Shameer

Thanks,
Jean

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