Thread (29 messages) 29 messages, 4 authors, 2020-03-25

Re: [PATCH v3 3/4] media: i2c: ov5645: Set maximum leverage of external clock frequency to 24480000

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Date: 2020-03-13 21:23:53
Also in: linux-devicetree, linux-media, linux-renesas-soc, lkml

Hi Prabhakar,

Thank you for the patch.

On Fri, Mar 13, 2020 at 09:12:33PM +0000, Lad Prabhakar wrote:
quoted hunk ↗ jump to hunk
While testing on Renesas RZ/G2E platform, noticed the clock frequency to
be 24242424 as a result the probe failed. However increasing the maximum
leverage of external clock frequency to 24480000 fixes this issue. Since
this difference is small enough and is insignificant set the same in the
driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/media/i2c/ov5645.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/media/i2c/ov5645.c b/drivers/media/i2c/ov5645.c
index 4fbabf3..b49359b 100644
--- a/drivers/media/i2c/ov5645.c
+++ b/drivers/media/i2c/ov5645.c
@@ -1107,8 +1107,10 @@ static int ov5645_probe(struct i2c_client *client)
 	}
 
 	xclk_freq = clk_get_rate(ov5645->xclk);
-	/* external clock must be 24MHz, allow 1% tolerance */
-	if (xclk_freq < 23760000 || xclk_freq > 24240000) {
+	/* external clock must be 24MHz, allow a minimum 1% and a maximum of 2%
+	 * tolerance
So where do these numbers come from ? I understand that 2% is what you
need to make your clock fit in the range, but why -1%/+2% instead of
-2%/+2% ? And why not 2.5 or 3% ? The sensor datasheet documents the
range of supported xvclk frequencies to be 6MHz to 54MHz. I understand
that PLL parameters depend on the clock frequency, but could they be
calculated instead of hardcoded, to avoid requiring an exact 24MHz input
frequency ?
+	 */
+	if (xclk_freq < 23760000 || xclk_freq > 24480000) {
 		dev_err(dev, "external clock frequency %u is not supported\n",
 			xclk_freq);
 		return -EINVAL;
-- 
Regards,

Laurent Pinchart

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