RE: [PATCHv5 10/20] PCI: mobiveil: Fix the INTx process errors
From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
Date: 2019-07-01 10:27:52
Also in:
linux-devicetree, linux-pci, lkml
Hi Lorenzo, Thanks a lot for your comments!
-----Original Message----- From: Lorenzo Pieralisi <redacted> Sent: 2019年6月29日 1:06 To: Z.q. Hou <zhiqiang.hou@nxp.com> Cc: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com; l.subrahmanya@mobiveil.co.in; shawnguo@kernel.org; Leo Li [off-list ref]; catalin.marinas@arm.com; will.deacon@arm.com; Mingkai Hu [off-list ref]; M.h. Lian [off-list ref]; Xiaowei Bao [off-list ref] Subject: Re: [PATCHv5 10/20] PCI: mobiveil: Fix the INTx process errors On Fri, Apr 12, 2019 at 08:36:12AM +0000, Z.q. Hou wrote:quoted
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> In the loop block, there is not code to update the loop key, this patch updates the loop key by re-read the INTx status register. This patch also add the clearing of the handled INTx status.This is two bugs and that requires two patches, each of them fixing a specific issue. So split the patch into two and repost it.
Yes, will split it. Thanks, Zhiqiang
Lorenzoquoted
Note: Need MV to test this fix. Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> Reviewed-by: Subrahmanya Lingappa <redacted> --- V5: - Corrected and retouched the subject and changelog. drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-)diff --git a/drivers/pci/controller/pcie-mobiveil.cb/drivers/pci/controller/pcie-mobiveil.c index 4ba458474e42..78e575e71f4d 100644--- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c@@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) /* Handle INTx */ if (intr_status & PAB_INTP_INTX_MASK) { shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; shifted_status >>= PAB_INTX_START; do { for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { @@-372,12quoted
+373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) dev_err_ratelimited(dev, "unexpected IRQ,INT%d\n",quoted
bit); - /* clear interrupt */ - csr_writel(pcie, - shifted_status << PAB_INTX_START, + /* clear interrupt handled */ + csr_writel(pcie, 1 << (PAB_INTX_START + bit), PAB_INTP_AMBA_MISC_STAT); } - } while ((shifted_status >> PAB_INTX_START) != 0); + + shifted_status = csr_readl(pcie, + PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; + shifted_status >>= PAB_INTX_START; + } while (shifted_status != 0); } /* read extra MSI status register */ -- 2.17.1
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