Thread (55 messages) 55 messages, 5 authors, 2019-03-29

RE: [PATCHv4 00/28] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs

From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
Date: 2019-03-27 02:11:19
Also in: linux-devicetree, linux-pci, lkml

Hi Lorenzo,

Thanks for your comments!
-----Original Message-----
From: Lorenzo Pieralisi <redacted>
Sent: 2019年3月27日 1:38
To: Z.q. Hou <zhiqiang.hou@nxp.com>
Cc: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com;
l.subrahmanya@mobiveil.co.in; shawnguo@kernel.org; Leo Li
[off-list ref]; catalin.marinas@arm.com; will.deacon@arm.com;
Mingkai Hu [off-list ref]; M.h. Lian [off-list ref];
Xiaowei Bao [off-list ref]
Subject: Re: [PATCHv4 00/28] PCI: refactor Mobiveil driver and add PCIe Gen4
driver for NXP Layerscape SoCs

On Mon, Mar 11, 2019 at 09:29:54AM +0000, Z.q. Hou wrote:
quoted
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

This patch set is aim to refactor the Mobiveil driver and add PCIe
support for NXP Layerscape series SoCs integrated Mobiveil's PCIe Gen4
controller.

Hou Zhiqiang (28):
  PCI: mobiveil: uniform the register accessors
  PCI: mobiveil: format the code without function change
  PCI: mobiveil: correct the returned error number
  PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI
  PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
  PCI: mobiveil: replace the resource list iteration function
  PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window
  PCI: mobiveil: use the 1st inbound window for MEM inbound
transactions
quoted
  PCI: mobiveil: correct inbound/outbound window setup routines
  PCI: mobiveil: fix the INTx process error
  PCI: mobiveil: only fix up the Class Code field
  PCI: mobiveil: move out the link up waiting from mobiveil_host_init
  PCI: mobiveil: move irq chained handler setup out of DT parse
  PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number
  dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional
  PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver
  PCI: mobiveil: fix the checking of valid device
  PCI: mobiveil: add link up condition check
  PCI: mobiveil: continue to initialize the host upon no PCIe link
  PCI: mobiveil: disabled IB and OB windows set by bootloader
  PCI: mobiveil: add Byte and Half-Word width register accessors
  PCI: mobiveil: make mobiveil_host_init can be used to re-init host
  dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller
  PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs
  PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577
  PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451
  arm64: dts: freescale: lx2160a: add pcie DT nodes
  arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4

 .../bindings/pci/layerscape-pci-gen4.txt      |  52 ++
 .../devicetree/bindings/pci/mobiveil-pcie.txt |   2 +
 MAINTAINERS                                   |  10 +-
 .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++
 arch/arm64/configs/defconfig                  |   1 +
 drivers/pci/controller/Kconfig                |  11 +-
 drivers/pci/controller/Makefile               |   2 +-
 drivers/pci/controller/mobiveil/Kconfig       |  34 +
 drivers/pci/controller/mobiveil/Makefile      |   5 +
 .../controller/mobiveil/pci-layerscape-gen4.c | 306 +++++++
.../controller/mobiveil/pcie-mobiveil-host.c  | 640 +++++++++++++
.../controller/mobiveil/pcie-mobiveil-plat.c  |  54 ++
 .../pci/controller/mobiveil/pcie-mobiveil.c   | 246 +++++
 .../pci/controller/mobiveil/pcie-mobiveil.h   | 229 +++++
 drivers/pci/controller/pcie-mobiveil.c        | 861 ------------------
 15 files changed, 1743 insertions(+), 873 deletions(-)  create mode
100644 Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt
 create mode 100644 drivers/pci/controller/mobiveil/Kconfig
 create mode 100644 drivers/pci/controller/mobiveil/Makefile
 create mode 100644
drivers/pci/controller/mobiveil/pci-layerscape-gen4.c
 create mode 100644
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
 create mode 100644
drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c
 create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c
 create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h
 delete mode 100644 drivers/pci/controller/pcie-mobiveil.c
This patch series is a mixture of fixes, refactoring and development and to be
frank it is a bit hard to review. Keeping in mind all the review comments
already received and that I expect you to integrate, do you mind splitting it in
logical series each one serving a specific purpose (eg fixes, Layerscape support,
etc.) ?

Let's start with posting and merging the fixes first.
Thanks for your suggestion, and will split them.
Thank you very much.

Lorenzo
Thanks,
Zhiqiang
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help