[PATCHv4 05/28] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
Date: 2019-03-11 09:31:26
Also in:
linux-devicetree, linux-pci, lkml
Subsystem:
pci native host bridge and endpoint drivers, pci subsystem, the rest · Maintainers:
Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas, Linus Torvalds
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
It should get PCI base address from the DT node property 'ranges'
to setup MEM/IO outbound windows instead of always zero.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge
IP driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <redacted>
---
V4:
- no change
drivers/pci/controller/pcie-mobiveil.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index a0dd337c6214..8ff873023b5f 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c@@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) /* configure outbound translation window */ program_ob_windows(pcie, pcie->ob_wins_configured, - win->res->start, 0, type, - resource_size(win->res)); + win->res->start, + win->res->start - win->offset, + type, resource_size(win->res)); } /* setup MSI hardware registers */
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel