Add cpu clock node on AP
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4 ++++
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 6 ++++++
2 files changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
index 64632c873888..f2fd777d1944 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
@@ -21,6 +21,7 @@
reg = <0x000>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&cpu_clk 0>;
};
cpu1: cpu at 1 {
device_type = "cpu";@@ -28,6 +29,7 @@
reg = <0x001>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&cpu_clk 0>;
};
cpu2: cpu at 100 {
device_type = "cpu";@@ -35,6 +37,7 @@
reg = <0x100>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&cpu_clk 1>;
};
cpu3: cpu at 101 {
device_type = "cpu";@@ -42,6 +45,7 @@
reg = <0x101>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&cpu_clk 1>;
};
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 4a65e4e830aa..27c840e91abe 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -280,6 +280,12 @@
#address-cells = <1>;
#size-cells = <1>;
+ cpu_clk: clock-cpu {
+ compatible = "marvell,ap806-cpu-clock";
+ clocks = <&ap_clk 0>, <&ap_clk 1>;
+ #clock-cells = <1>;
+ };
+
ap_thermal: thermal-sensor at 80 {
compatible = "marvell,armada-ap806-thermal";
reg = <0x80 0x10>;--
2.19.0