On Tue, Jan 21, 2014 at 10:14:49AM -0800, Olof Johansson wrote:

On Tue, Jan 21, 2014 at 12:55 AM, Ulf Hansson [off-list ref] wrote:

quoted

That could make sense, but still I wonder how those shall be handled
in a fine grained power management setup. In other words, when shall
those be gated/ungated? Is the mmc core able to take the correct
decision about these?

The reference clock is in most cases I've seen 32kHz, and not
something that's under fine-grained power management. So it's not used
to regulate interface speed, etc.

I have seen devices connected using SDIO which did use fine grained
power management here with faster clocks.  They're definitely not the
common case but they're there.  :/
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