Thread (23 messages) 23 messages, 4 authors, 2013-10-18

[PATCH v3 6/7] arm64, jump label: optimize jump label implementation

From: Will Deacon <hidden>
Date: 2013-10-17 09:40:26
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On Wed, Oct 16, 2013 at 06:11:45PM +0100, Jiang Liu wrote:
On 10/16/2013 07:46 PM, Will Deacon wrote:
quoted
quoted
+	} else {
+		insn = aarch64_insn_gen_nop();
You could make the code more concise by limiting your patching ability to
branch immediates. Then a nop is simply a branch to the next instruction (I
doubt any modern CPUs will choke on this, whereas the architecture requires
a NOP to take time).
I guess a NOP should be more effecient than a "B #4" on real CPUs:)
Well, I was actually questioning that. A NOP *has* to take time (the
architecture prevents implementations from discaring it) whereas a static,
unconditional branch will likely be discarded early on by CPUs with even
simple branch prediction logic.

Will
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