Hi Paul,

Tested this whole set on omap3beagle and omap4panda. The only regression
I noticed was that cpu0 debug counters do not increment on omap4 after
this set. The patch at the end fixes this problem. Other than that, you
can add acked-by tag from me if you want, I went the code through
quickly and don't have any comments to it.

-Tero

From: Tero Kristo <redacted>
Date: Thu, 3 Jan 2013 20:07:27 +0200
Subject: [PATCH] ARM: OMAP4: PM: fix cpu0 statistics update during idle

Cpu0 PM counters do not update, as the  cpu0 fpwrst is set to ON before
calling pwrdm_post_transition. The optimized code checks whether the
fpwrst is ON, and skips any further checks if this is the case. Fixed
by re-ordering the code within omap4_mpuss_enter_lowpower function.

Signed-off-by: Tero Kristo <redacted>
---
 arch/arm/mach-omap2/omap-mpuss-lowpower.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c

b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 9acd52a..1bdd59e 100644

--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c

@@ -269,10 +269,16 @@ int omap4_mpuss_enter_lowpower(unsigned int cpu,

u8 fpwrst)
 	 * domain transition
 	 */
 	wakeup_cpu = smp_processor_id();
-	WARN_ON(pwrdm_set_next_fpwrst(pm_info->pwrdm, PWRDM_FUNC_PWRST_ON));
 
+	/*
+	 * Due to optimizations to the code, pwrdm_post_transition
+	 * must be called prior to resetting cpu0 pwrst to ON,
+	 * otherwise cpu0 powerstate statistics don't update properly
+	 */
 	pwrdm_post_transition(NULL);
 
+	WARN_ON(pwrdm_set_next_fpwrst(pm_info->pwrdm, PWRDM_FUNC_PWRST_ON));
+
 	return 0;
 }
 
-- 
1.7.4.1