[PATCH 09/12] ARM: OMAP2+: powerdomain: skip register reads for powerdomains known to be on
From: Santosh Shilimkar <hidden>
Date: 2012-12-21 06:33:33
Also in:
linux-omap
From: Santosh Shilimkar <hidden>
Date: 2012-12-21 06:33:33
Also in:
linux-omap
On Thursday 20 December 2012 10:52 PM, Paul Walmsley wrote:
On Wed, 19 Dec 2012, Jon Hunter wrote:quoted
My understanding is that for OMAP4 devices, the core power domain may not be active the same time as the MPU power domain. The Cortex-A9 has the ability to access some peripherals (such as timer, McBSP) via a private bus that does not require the core domain to be active. This is a difference from OMAP3 devices, where the core would always be on with the MPU power domain.You are absolutely right and I will drop that part from this patch.
Just to be clear, MPU has direct path to ABE domain peripherals on OMAP4. As Jon pointed out MCBSP and few timers are put under this domain can be directly accessed by MPU without L3. ABE also can be accessed via L3 by MPU. ABE has a dual map with MPU. Regards Santosh