Hi,

On Tue, Nov 8, 2011 at 11:42 PM, Paul Walmsley [off-list ref] wrote:

Hi

I just read

http://comments.gmane.org/gmane.comp.embedded.pandaboard/168

Looks to me that the L3_EMU interconnect and the emulation IP blocks need

You mean the "emu" hwmod in the patch should be kept and a new "l3_emu" hwmod
need to be added? and make the clkdm_name of 'l3_emu' points to CD_L3_2?

But in the link above, looks like the hwmod of "l3_main_3" and "l3_instr" need
to be enabled for routing IRQs of pmu on omap4.

to be added to the OMAP4 hwmod data, based on Section 2.2.1 "L3_EMU Memory
Space Mapping" in the OMAP4460 TRM Rev. I. ?If the clockdomain &
powerdomain are correctly defined then the OMAP framework code will
automatically enable these too.

thanks,
--
Ming Lei