[PATCH 4/5] ARM: scu: Move register defines to header file
From: Santosh Shilimkar <hidden>
Date: 2011-02-07 09:51:44
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linux-omap
-----Original Message----- From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk] Sent: Friday, February 04, 2011 5:01 PM To: Santosh Shilimkar Cc: catalin.marinas at arm.com; linus.ml.walleij at gmail.com; linux- omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org; ccross at android.com Subject: Re: [PATCH 4/5] ARM: scu: Move register defines to header file
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8<------ Subject: [PATCH] ARM: smp: add function to set WFI low-power mode for SMP CPUs Add a function to set the SCU low-power mode for SMP CPUs. This centralizes this functionality rather than having to expose the SCU register definitions to each platform. Signed-off-by: Russell King <redacted> --- arch/arm/include/asm/smp_scu.h | 5 +++++ arch/arm/kernel/smp_scu.c | 24 ++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 0 deletions(-)
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quoted hunk ↗ jump to hunk
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index 9ab4149..0ba329a 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c@@ -50,3 +50,27 @@ void __init scu_enable(void __iomem *scu_base) */ flush_cache_all(); } + +/* + * Set the executing CPUs power mode as defined. This will be in + * preparation for it executing a WFI instruction. + * + * This function must be called with preemption disabled, and as it + * has the side effect of disabling coherency, caches must havebeen + * flushed. Interrupts must also have been disabled. + */ +int scu_power_mode(void __iomem *scu_base, unsigned int mode) +{ + unsigned int val; + int cpu = smp_processor_id(); + int shift;
shift is unused with this version now so I am removing it.
+ + if (mode > 3 || mode == 1 || cpu > 3) + return -EINVAL; + + val = __raw_readb(scu_base + SCU_CPU_STATUS + cpu) & ~0x03; + val |= mode; + __raw_writeb(val, scu_base + SCU_CPU_STATUS + cpu); + + return 0; +} -- 1.6.2.5