USB mass storage and ARM cache coherency
From: oliver@neukum.org (Oliver Neukum)
Date: 2010-02-19 20:53:42
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From: oliver@neukum.org (Oliver Neukum)
Date: 2010-02-19 20:53:42
Also in:
lkml
Am Freitag, 19. Februar 2010 18:36:51 schrieb Catalin Marinas:
If a page is already mapped in user space, flush_dcache_page() on ARM does the flushing rather than deferring it to update_mmu_cache(). The PIO HCD drivers, however, don't call flush_dcache_page(). Is it possible that the HCD could transfer data into a page cache page already mapped in user space? My understanding is that the scenario above is possible.
Yes, video drivers do that. Regards Oliver