Thread (155 messages) 155 messages, 18 authors, 2010-03-11

USB mass storage and ARM cache coherency

From: benh@kernel.crashing.org (Benjamin Herrenschmidt)
Date: 2010-02-17 12:18:09
Also in: lkml

On Wed, 2010-02-17 at 11:23 +0100, Oliver Neukum wrote:
The request a low-level driver does is all or nothing. Either DMA
issues have to be handled by that driver alone, or a finer-grained
description of the DMA requirements is needed. A fix using the latter
approach is being worked on. 
Well, that's what I'm trying to understand.

IE. It's a pretty strong rule ... don't do CPU accesses between dma_map
and unmap. So it's all in driver land at that stage. I'm not sure how
the DMA requirements get into the picture here. IE. That rule is
globally true. It's not going to hurt just non-coherent archs, it's
going to hurt anybody using swiotlb too... So I don't see you need more
info about the DMA requirements, but maybe I did miss something :-)

Cheers,
Ben.
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help