On Mon, Jul 19, 2021 at 6:50 PM fengchengwen [off-list ref] wrote:

Many thank.

Most of the comment fixed in v7, and v7 still include implementation.

Changes good to me.

I did a thorough test of the implementation, so could you please review
the implementation also ?

Wiil do

One comment is modified as follows:
COMMENT:

quoted

quoted

+                *    |     |   |        ------------------
+                *    |     |DMA|        |                |        ------
+                *    |     |   |        |                |--------| EP |
+                *    |     |   |--------| PCIE Core2     |        ------
+                *    |     |   |        |                |        ------
+                *    |     |   |        |                |--------| EP |
+                *    |     |   |        |                |        ------
+                *    |     -----        ------------------

This diagram does not show correctly in doxygen. Please fix it.

REPLY: I can't find the right way to show it as correctly except split them to two
part (one with doxygen format, and the other not), so if you have a good idea,
please let me know, thanks.

Use   \code{.unparsed}  \endcode

diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index 1518187c1e..df2d9f975c 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h

@@ -463,12 +463,14 @@ struct rte_dmadev_port_param {
         * @see enum rte_dmadev_port_type
         */
        union {
-               /* The following model shows SoC's PCIe module connects to
+               /**
+                * The following model shows SoC's PCIe module connects to
                 * multiple PCIe hosts and multiple endpoints. The PCIe module
                 * has an integrate DMA controller.

integrate -> integrated


                 * If the DMA wants to access the memory of host A, it can be
                 * initiated by PF1 in core0, or by VF0 of PF0 in core0.
                 *
+                * \code{.unparsed}
                 * System Bus
                 *    |     ----------PCIe module----------
                 *    |     Bus

@@ -499,8 +501,9 @@ struct rte_dmadev_port_param {
                 *    |     |   |        |                |--------| EP |
                 *    |     |   |        |                |        ------
                 *    |     -----        ------------------
-                */
-               /** The following structure is used to describe the PCIe access
+                *   \endcode
+                *
+                * The following structure is used to describe the PCIe access
                 * port parameters.
                 *
                 * @note If some fields can not be supported by the

[main]dell[dpdk.org]

On 2021/7/19 14:21, Jerin Jacob wrote:

quoted

On Mon, Jul 19, 2021 at 9:02 AM Chengwen Feng [off-list ref] wrote:

quoted

This patch introduce 'dmadevice' which is a generic type of DMA
device.

The APIs of dmadev library exposes some generic operations which can
enable configuration and I/O with the DMA devices.

Signed-off-by: Chengwen Feng <redacted>

The API specification aspects look pretty good to me.

Some minor comments are below. You can add my Acked by on future version
API header file where you will split the patch.

[snip]