Thread (17 messages) 17 messages, 3 authors, 12h ago

[PATCH net v3 0/4] dpll: zl3073x: fix output pin frequency, esync and sibling notifications

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From: Ivan Vecera <ivecera@redhat.com>
Date: 2026-10-06 15:31:26
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Revision v3 of 2 in this series.

Revisions (2)
  1. v3 current
  2. v4 [diff vs current]
This series fixes several issues in the zl3073x output pin handling.

Patch 1 rejects output frequencies whose divisor is too small for the
hardware (less than 2, or less than 4 for the N-pin of an N-divided
output) as well as a zero frequency; such frequencies were accepted and
offered to userspace before.

Patch 2 makes the embedded sync (eSync) configuration follow the output
carrier frequency. Changing an output pin's frequency did not update its
eSync period/width, so eSync ran at the wrong rate and, for a 1 Hz
carrier, could get stuck on because esync_get() hides it. This was hit
during development and confirmed on an oscilloscope.

Patch 3 rejects N-divided output frequencies that cannot be represented
exactly. Such requests used to be silently rounded, which could also
change the sibling N-pin frequency.

Patch 4 notifies the sibling pin of an output pair when a shared HW
setting (divisor, clock type, eSync period/width, phase compensation) is
changed through one pin, so userspace is told the change happened. It
also ties the zldpll->pins list membership to the DPLL registration
state so the sibling lookup cannot miss a registered pin during probe or
teardown.

Changes since v2:
- Added patch 1 ("reject output frequencies with too small divisor").
- Added patch 3 ("reject inexact frequencies for N-divided outputs"),
  ordered before the notification patch so that a successful P-pin
  frequency change is guaranteed to keep the N-pin frequency unchanged.
- Patch 2: simplify zl3073x_out_esync_is_enabled(); reword the
  esync_get() readback note to only claim what it does - it reports the
  driver's nominal 1 Hz / 25% eSync model and does not faithfully report
  a configuration the driver did not program.
- Patch 4: add/remove pins from zldpll->pins around dpll_pin_register()/
  dpll_pin_unregister() so a registered sibling is always findable by the
  notification lookup (fixes a lost notification during probe/teardown
  pointed out in the v2 review).

Changes since v1:
- Patch 2: pass the actual output carrier (synth_freq / out.div) to
  zl3073x_out_esync_enable() in the frequency change path, matching
  esync_set() (no functional change, output frequencies always divide
  the synth frequency); drop the redundant "? true : false" reported by
  coccinelle (boolconv); note in the commit message that esync_get() now
  reports the fixed 1 Hz / 25% values the driver programs; fix a comment
  typo.
- Patch 4: narrow the commit message wording about zldpll->lock to the
  new sibling lookup helper (no code change).
- Both original commit messages now describe how the issues were found
  and whether they were triggered, as requested on the v1 thread.

v2: https://lore.kernel.org/netdev/20261002074520.30048-1-ivecera@redhat.com/ (local)
v1: https://lore.kernel.org/netdev/20261001080648.1424172-1-ivecera@redhat.com/ (local)

Ivan Vecera (4):
  dpll: zl3073x: reject output frequencies with too small divisor
  dpll: zl3073x: make embedded sync follow the output carrier frequency
  dpll: zl3073x: reject inexact frequencies for N-divided outputs
  dpll: zl3073x: notify sibling pin when shared output config changes

 drivers/dpll/zl3073x/dpll.c | 244 +++++++++++++++++++++++++++---------
 drivers/dpll/zl3073x/out.h  |  36 ++++++
 drivers/dpll/zl3073x/prop.c |  29 +++--
 3 files changed, 241 insertions(+), 68 deletions(-)

-- 
2.55.0
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