On 9/8/26 8:23 AM, Mohd Ayaan Anwar wrote:
Add the two Gigabit Ethernet controllers present on Shikra (ethernet0
at 0x5d00000, ethernet1 at 0x5d20000). Both nodes are left disabled;
board files supply the PHY details.
Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
---
[...]
+ ethernet1: ethernet@5d20000 {
+ compatible = "qcom,shikra-ethqos";
+ reg = <0x0 0x05d20000 0x0 0x10000>,
+ <0x0 0x05d36000 0x0 0x100>;
+ reg-names = "stmmaceth", "rgmii";
+
+ interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "macirq";
+
+ clocks = <&gcc GCC_EMAC1_AXI_CLK>,
+ <&gcc GCC_EMAC1_AHB_CLK>,
+ <&gcc GCC_EMAC1_PTP_CLK>,
+ <&gcc GCC_EMAC1_RGMII_CLK>,
+ <&gcc GCC_EMAC1_AXI_SYS_NOC_CLK>,
+ <&gcc GCC_PCIE_TILE_AXI_SYS_NOC_CLK>;
+ clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii",
+ "axi-noc", "pcie-tile-axi-noc";
Ideally one a line, also for reg-anmes above and icc-names below
Reviewed-by: Konrad Dybcio <redacted>
Konrad