[PATCH net-next v18 2/3] net: phy: Add support for Template Control register for PMA
From: Kyle Switch <hidden>
Date: 2026-09-15 08:22:07
Also in:
lkml
Subsystem:
ethernet phy library, networking drivers, the rest · Maintainers:
Andrew Lunn, Heiner Kallweit, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
Add support for the 10GBASE-T PMA Template Test Mode register field, which allows selecting one of eight test modes (Normal and TestMode1..TestMode7) used for PHY validation. Signed-off-by: Kyle Switch <redacted> --- drivers/net/phy/phy-c45.c | 24 ++++++++++++++++++++++++ include/linux/phy.h | 1 + include/uapi/linux/mdio.h | 12 ++++++++++++ 3 files changed, 37 insertions(+)
diff --git a/drivers/net/phy/phy-c45.c b/drivers/net/phy/phy-c45.c
index 870920311f9a..f8e03d3afa45 100644
--- a/drivers/net/phy/phy-c45.c
+++ b/drivers/net/phy/phy-c45.c@@ -1408,6 +1408,30 @@ int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable) } EXPORT_SYMBOL_GPL(genphy_c45_fast_retrain); +/** + * genphy_c45_template_testmode - configure template testmode registers + * @phydev: target phy_device struct + * @test_mode: testmode includes Normal to Test mode 7 + * + * Description: Set template testmode include Normal to Test mode 7 + * + * Return: 0 on success, or a negative error code on failure (e.g. register + * read/write error). + */ +int genphy_c45_template_testmode(struct phy_device *phydev, int test_mode) +{ + int ctrl; + + if (test_mode < MDIO_PMA_10GBT_TESTMODE_NORMAL || + test_mode > MDIO_PMA_10GBT_TESTMODE_7) + return -EOPNOTSUPP; + + ctrl = FIELD_PREP(MDIO_PMA_10GBT_TESTMODE_MASK, test_mode); + return phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TESTMODE, + MDIO_PMA_10GBT_TESTMODE_MASK, ctrl); +} +EXPORT_SYMBOL_GPL(genphy_c45_template_testmode); + /** * genphy_c45_plca_get_cfg - get PLCA configuration from standard registers * @phydev: target phy_device struct
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 3d8afe6b7f1c..fb827cc3c98f 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h@@ -2357,6 +2357,7 @@ int genphy_c45_loopback(struct phy_device *phydev, bool enable, int speed); int genphy_c45_pma_resume(struct phy_device *phydev); int genphy_c45_pma_suspend(struct phy_device *phydev); int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); +int genphy_c45_template_testmode(struct phy_device *phydev, int test_mode); int genphy_c45_plca_get_cfg(struct phy_device *phydev, struct phy_plca_cfg *plca_cfg); int genphy_c45_plca_set_cfg(struct phy_device *phydev,
diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
index 06f4bc3c20c7..353ca13c64fc 100644
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h@@ -63,6 +63,7 @@ /* Media-dependent registers. */ #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ +#define MDIO_PMA_10GBT_TESTMODE 132 /* Test mode control */ #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. * Lanes B-D are numbered 134-136. */ #define MDIO_PMA_10GBR_FSRT_CSR 147 /* 10GBASE-R fast retrain status and control */
@@ -320,6 +321,17 @@ /* PMA 10GBASE-R Fast Retrain status and control register. */ #define MDIO_PMA_10GBR_FSRT_ENABLE 0x0001 /* Fast retrain enable */ +/* PMA 10GBASE-T Template Test Mode Register*/ +#define MDIO_PMA_10GBT_TESTMODE_MASK GENMASK(15, 13) /* Template test mode */ +#define MDIO_PMA_10GBT_TESTMODE_NORMAL 0x0 /* Template Normal */ +#define MDIO_PMA_10GBT_TESTMODE_1 0x1 /* Template TestMode1 */ +#define MDIO_PMA_10GBT_TESTMODE_2 0x2 /* Template TestMode2 */ +#define MDIO_PMA_10GBT_TESTMODE_3 0x3 /* Template TestMode3 */ +#define MDIO_PMA_10GBT_TESTMODE_4 0x4 /* Template TestMode4 */ +#define MDIO_PMA_10GBT_TESTMODE_5 0x5 /* Template TestMode5 */ +#define MDIO_PMA_10GBT_TESTMODE_6 0x6 /* Template TestMode6 */ +#define MDIO_PMA_10GBT_TESTMODE_7 0x7 /* Template TestMode7 */ + /* PCS 10GBASE-R/-T status register 1. */ #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 /* Block lock attained */
--
2.25.1