Re: [PATCH net v2] net: amd-xgbe: support receiving packets with bad FCS

On Fri, 28 Aug 2026 09:35:27 +1000
aslan.jnn@gmail.com wrote:

Hi David,

I agree with your first statement. I've just submitted the v3 of this patch
which removes the DCRCC unsetting on xgbe_disable_rx.

And thanks for your input for setting MAC_RCR non-atomically like that! I
didn't thought much about it before, to be honest. Will try handling that
on the next submission.

I'm assuming there is some kind of reset that sets the MAC_RCR register to
all zero?
If so you don't need to change it at all.
If not then you need to absolutely ensure all bits are initialised to valid
values before the receiver is enabled.

David

  James

On Fri, Aug 21, 2026 at 9:36:46PM +0100, David Laight [off-list ref] wrote:

quoted

On Wed, 19 Aug 2026 19:16:56 +1000
James [off-list ref] wrote:


You can delete the line in the disable function that turns it off.

But, really, you should be setting the required MAC_RCR bits in a single
write.
Doing RMW sequences on the hardware registers for each bit is really wrong.
You also need to start with a known value for all the bits, otherwise
'silly' things can happen is (say) some bios boot code set bits you don't
otherwise change.

	David