Re: [PATCH v2 05/10] arm64: dts: rockchip: rk3568: add XPCS and fixed-clock nodes
From: Andrew Lunn <andrew@lunn.ch>
Date: 2026-08-01 21:06:05
Also in:
linux-arm-kernel, linux-devicetree, linux-phy, linux-renesas-soc, linux-rockchip, lkml
During my tests, I found that the 125 MHz clocks (`xpcs_gmac0_clk` / `xpcs_gmac1_clk`) are actually outputs of the Naneng Combo PHY (SerDes) when it's initialized for SGMII/QSGMII mode, rather than independent board-level oscillators.
Do you have documentation for these Combo PHYs? Can these clocks be
enabled/disabled? And how is the Combo PHY fed with a clock? Does it
have an external oscillator/crystal?
Andrew