Re: Re: [PATCH net-next v3 3/3] riscv: dts: eswin: eic7700-hifive-premier-p550: enable Ethernet controller
From: 李志 <hidden>
Date: 2026-03-10 07:16:21
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linux-arm-kernel, linux-devicetree, linux-riscv, lkml
-----原始邮件----- 发件人: "Yao Zi" [off-list ref] 发送时间:2026-03-03 18:32:38 (星期二) 收件人: lizhi2@eswincomputing.com, devicetree@vger.kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, netdev@vger.kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, rmk+kernel@armlinux.org.uk, wens@kernel.org, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org 抄送: ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, pritesh.patel@einfochips.com, weishangjuan@eswincomputing.com 主题: Re: [PATCH net-next v3 3/3] riscv: dts: eswin: eic7700-hifive-premier-p550: enable Ethernet controller On Tue, Mar 03, 2026 at 02:17:32PM +0800, lizhi2@eswincomputing.com wrote:quoted
From: Zhi Li <redacted> Enable the on-board Gigabit Ethernet controller on the HiFive Premier P550 development board. Signed-off-by: Zhi Li <redacted> --- .../dts/eswin/eic7700-hifive-premier-p550.dts | 50 +++++++++++++++++ arch/riscv/boot/dts/eswin/eic7700.dtsi | 54 +++++++++++++++++++ 2 files changed, 104 insertions(+)diff --git a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts index 131ed1fc6b2e..d558f0fdfb38 100644 --- a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts +++ b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts...quoted
@@ -20,6 +22,54 @@ chosen { }; }; +&gmac0 { + phy-handle = <&gmac0_phy0>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio106_pins>; + rx-internal-delay-ps = <20>; + tx-internal-delay-ps = <100>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio";Since it's implemented in the DWMAC IP, I think the mdio bus is SoC-specific and should be put into the SoC devicetree instead.
Hi Yao Zi, Thanks for the review. You're right that the MDIO bus is implemented as part of the DWMAC IP and is therefore SoC-specific. It makes more sense to describe the MDIO controller in the SoC dtsi. I'll move the MDIO node to eic7700.dtsi and keep only the PHY node in the board dts in the next revision. Thanks, Zhi Li